This course introduces advanced theoretical and technical knowledge of digital circuits and embedded systems. Digital and embedded systems are at the heart of almost all modern mechatronic and electronic technologies, ranging from smartphones to robots and autonomous vehicles. The course has a clear hardware focus, with the first half of the curriculum centered around the analysis and design of sequential logic circuits, and their implementation on field-programmable-gate-array (FPGA) platform using the Verilog hardware-description language. The later part of the course focuses on microcontroller-based embedded system design using ARM chips and C programming. Through the many lab activities and projects, students will have the opportunity to analyse, design, bench test and operate a variety of systems. The course will also develop advanced cognitive, technical and communication skills associated with complex digital design problems.

Learning Outcomes

Upon successful completion, students will have the knowledge and skills to:

1. Explain the fundamental principles of sequential digital circuits and finite state machines.
2. Compare and describe the architecture and fundamental concepts of modern embedded microprocessor systems.
3. Design complex digital systems using schematics and Verilog HDL, and implement these on commercial-grade field-programmable gate array (FPGA) development boards.
4. Design an embedded system using C/C++ programming and microcontroller boards.
5. Analyse critically, and evaluate the performance of systems against given design requirements.
6. Plan, execute and report on a small project working in a group, communicating effectively in written and verbal form about their work.

Research-Led Teaching

The course will have guest lectures delivered by industry professionals.

Field Trips

N/A

Additional Course Costs

N/A

Examination Material or equipment

All in-lab tests will provide for access to course materials, personal notes, and offline reference materials. Access to online resources may be restricted. More specific task-based information will be provided during the course.

In the final exam, students may bring a double-sided A4 piece of paper with handwritten annotations. Students who are non-native English speakers are allowed a paper-based dictionary to assist with language interpretation if beneficial.

Required Resources

o Access to a Windows or Linux PC. 

o Required software installed, where the software is free to download and use.

o An FPGA development board and a micro-controller development board.

o Students will have access to these boards in the labs.

o Students will be able to borrow boards for take-home use to assist with home-base practice and preparing for their project assignment. Information will be provided on the course Canvas page. Any board borrowed must be returned after the project demo session.

o Please contact the Lecturer for any difficulties with accessing such resources.

o A lab notebook – An empty book with sufficient pages (e.g., 128 pages). Students should number each page (e.g., by hand).

Recommended Resources

o A recommended reading list is provided on the Canvas website.

o Students are encouraged to install the software for FPGA development and micro-controller development to assist with their learning, labs, and project work. Additional information on recommended software will be made available on Canvas.

Staff Feedback

Students will be given feedback in the following forms in this course:

o  Verbally, during lab activities where tutors make observations on students’ performance and progress.

o  In writing, as response to their assignment/project submissions.

Student Feedback

ANU is committed to the demonstration of educational excellence and regularly seeks feedback from students. Students are encouraged to offer feedback directly to their Course Convener or through their College and Course representatives (if applicable). Feedback can also be provided to Course Conveners and teachers via the Student Experience of Learning & Teaching (SELT) feedback program. SELT surveys are confidential and also provide the Colleges and ANU Executive with opportunities to recognise excellent teaching, and opportunities for improvement.

Other Information

Referencing requirements and academic integrity

The IEEE citation style is required for references in the assignments of this course. Students are suggested to read the file named IEEE Citation Reference (which is uploaded into the Canvas website) to know the requirements of this style, and pay special attention to correct citation format of books, conference articles, online sources, and periodicals. For the sake of professionalism, the citation of non-publicised materials such as lecture slides should be kept to a minimum.

Important: Students often “appropriate” codes from external sources for their work without citation. Where students adopt external codes as part of their submitted work, essential in-code referencing is required (see http://integrity.mit.edu/handbook/writing-code).

Students should remain mindful of the possible disciplinary consequences of poor referencing practices.

Generative AI statement for ENGN4213/6213

Generative AI tools are permitted in this course, in a strictly-limited, transparently-documented capacity.

This course teaches a range of foundational design and development techniques related to digital electronics and embedded systems, some of which could be potentially addressed by certain Generative AI tools (e.g., ChatGPT). The project tasks are intended to evaluate students' embedded development skills as well as their ideation ability when it comes to creating a solution to a real-world problem. These important learning outcomes might be impacted by excessive reliance on AI.

The use of Generative AI tools in this course is only permitted:

• in take-home assignments; and
• for assistive, but not solution-generating activities, e.g., conducting information searches, assist with the understanding of concepts, troubleshooting hardware. Importantly: direct incorporation of Verilog code outputs generated by AI tools is explicitly disallowed and will be considered a violation of academic integrity principles. All project submissions must be accompanied by an "AI usage" appendix, which will give a comprehensive account of how AI was used by the student, including the names of any tools, prompt strategies used, and an explanation of how the tool outputs contributed to the assignment.

Class Schedule

Week/Session	Summary of Activities	Assessment
1	In-class session: Course introduction (1h)Prerecorded lectures: From transistors to combinational logic Non-ideal behaviour of combinational logic circuits
2	In-class session: Discussion lectorials (1h + 1h) Pre-recorded lectures: Sequential Logic  Verilog_Part_I FPGA Design Flow Part 1 Tutorial 1	Lab 1: Introduction to Vivado
3	In-class session: Discussion lectorial (1h)Pre-recorded lectures VL6: Verilog_Part_II FPGA Design Flow Part 2 Tutorial 2	Lab 2: Implementing designs onto FPGA and Essential sequential designs
4	In-class session: Discussion lectorial (1h) Finite state machines (FSM) FSM Examples Tutorial 3	Lab 3: SSDs & Switch debouncers
5	In-class session: Discussion Lectorial (1h)Pre-recorded lectures: Practical aspects of design RAM and ROM memories Tutorial 4	Lab 4: External hardware and analog interfacing
6	In-class session: FPGA topics wrap-up (1h)Project drop-in sessions (1h)	Lab 5: Complex system implementation on a FPGA
7	In-class session: Discussion lectorial (1h)Guest Lecture (1h)Pre-recorded lectures: Introduction to micro-controllers General-purpose input/output (GPIO) and interrupts	Guest Lab: FPGA and soft cores (tentatively allocated, depending on industry partner staffing availability)FPGA Project submission.
8	In-class session: Discussion lectorial (1h)Pre-recorded lectures: STM32: Timers STM32: DMA and serial communication UART Tutorial 5	FPGA Project: Demo assessmentLab 6: Microcontroller GPIO and interrupts
9	In-class session: Discussion lectorial (1h)Pre-recorded lectures: STM32: Serial communication SPI STM32: Serial communication I2C Tutorial 6	Lab 7: Microcontroller UART, Timer
10	In-class session: Discussion lectorial (1h)Pre-recorded lectures:• STM32: ADC DMA triggered by timerMicro-controller Project Drop-in sessionsTutorial 7	Lab 8: Microcontroller ADC, I2CC Primer quiz (to be completed in-lab)
11	In-class session: Course wrap-up	Practice session for microcontroller lab test
12	Possible Guest lecture (TBD)	Microcontroller lab test
14		Final exam

Tutorial Registration

Please register Lab and Tutorial sessions via the MyTimetable system, by following the instructions on the ENGN4213/6213 Canvas website.

Assessment Summary

Assessment task	Value	Learning Outcomes
Practical Labs	27 %	1,2,3,4,5
FPGA Project	19 %	1,3,5,6
C Primer Quiz	5 %	4
Micro-Controller Lab assessment	19 %	2,4,5
Final exam	30 %	1, 2, 3

* If the Due Date and Return of Assessment date are blank, see the Assessment Tab for specific Assessment Task details

Policies

ANU has educational policies, procedures and guidelines , which are designed to ensure that staff and students are aware of the University’s academic standards, and implement them. Students are expected to have read the Academic Integrity Rule before the commencement of their course. Other key policies and guidelines include:

• Academic Integrity Policy and Procedure
• Student Assessment (Coursework) Policy and Procedure
• Extenuating Circumstances Application
• Student Surveys and Evaluations
• Deferred Examinations
• Student Complaint Resolution Policy and Procedure
• Code of practice for teaching and learning

Assessment Requirements

The ANU is using Turnitin to enhance student citation and referencing techniques, and to assess assignment submissions as a component of the University's approach to managing Academic Integrity. For additional information regarding Turnitin please visit the Academic Skills website. In rare cases where online submission using Turnitin software is not technically possible; or where not using Turnitin software has been justified by the Course Convener and approved by the Associate Dean (Education) on the basis of the teaching model being employed; students shall submit assessment online via ‘Canvas’ outside of Turnitin, or failing that in hard copy, or through a combination of submission methods as approved by the Associate Dean (Education). The submission method is detailed below.

Moderation of Assessment

Marks that are allocated during Semester are to be considered provisional until formalised by the College examiners meeting at the end of each Semester. If appropriate, some moderation of marks might be applied prior to final results being released.

Participation

ENGN4213/6213 adopts a dialogic approach to teaching and learning. Activities are designed to trigger student-led conversations in the classroom, both among peers and between students and teachers. Dialogue is instrumental in creating an engaging class environment and supports teachers' ability to tackle the specific needs of learners. Regular and active class participation by all students is therefore highly encouraged. This is particularly true of the in-class sessions ("lecture" timeslots) , which will run in a discussion style and may render poorly if reviewed as deferred recordings.

Assessment Task 1

Practical Labs

ENGN4213/6213 is a practical, hands-on course. Practical labs are thus an essential activity that allows students to practice and demonstrate the technical skills taught in the course.

Practical labs in Semester 1 of 2026 will be running on campus. As per the latest ANU learning guidelines, labs are offered as an in-person learning activity, with remote completion options no longer supported. Each student is required to sign up for their preferred lab session in MyTimetable before the course starts. Practical labs run for 9-10 weeks of semester, where the first six labs are related to FPGA, while the last four labs are related to micro-controller work. Depending on occupancy levels in each session, students may carry out the lab activities individually or in pairs.

Lab instruction sheets will be provided at least one week ahead. Students are strongly encouraged to review the instructions before attending the sessions, and, if possible, attempt any preparatory activities before coming to class as this will greatly increase their ability to complete all tasks on the day. ENGN4213/6213 labs are complex and quite a bit more involved than any other activities you may have attempted in previous electronics courses. Good advance preparation is key to a successful lab experience.

Lab activities are attached to a grade component. Lab marks are awarded based on students’ completion of lab tasks, and not in response to assessment-style questions. To obtain the marks, students must attend their signed lab session and show their completed activities (e.g., implemented designs on their development board and/or their lab notebook) to the demonstrators before the end of the session.

Students are required to keep an individual "lab notebook". This notebook must be taken to all sessions, and all working out or notes related to the lab must be written in it. It does not have to be neat but pages must not be removed – mistakes can just be crossed out. The lab demonstrator may ask students to show their lab notebooks as they assign their lab grade. The lab notebook provides a continuous and complete record of students' individual engagement in the lab activities.

Weight of all practical labs: 27% of the total mark for all practical labs, where each lab carries a weighting of 2% -- 4% (refer to detailed guide on the course page)

Assessment Task 2

FPGA Project

Students are required to independently develop an embedded solution using an FPGA development board. The project is conducted in groups of 2 students and involves hands-on work using the board.

Rubric: An assessment criteria document will be made available on the Canvas website.

Weight: 19% of the total mark.

Assessment items: One written report from each group and demo / testing of hardware implementation of submitted solution.

Assessment sessions of submitted solution: Will be scheduled throughout Week 7. Session allocation will be determined by the Teaching Team. Students will be advised through Canvas.

Report submission due and cut-off date: Will be due at the end of Week 7. Standard late submission provisions apply after the deadline.

Individual Assessment: The structure of the assessment will involve both individual and shared project tasks, which will be graded accordingly. Students completing double-badged course ENGN6213 will have one differentiated question appropriate for Master's level analysis.

Assessment Task 3

C Primer Quiz

Students are expected to work through a C Primer document with foundational concepts and exercises over 5 weeks of the course (weeks 5-9). The exercises for each week are not graded. Students will be able to complete a weekly online quiz on the course website to self-evaluate their understanding. It is possible to take the quiz as many times as needed. A working knowledge of the C Programming language is important to engage with the micro-controller components of the course.

This assessment will be conducted in Week 10. Students will attempt a final randomised multiple-choice quiz. This 15-minute task will be administered in-person in a computer lab, with multiple "open lab" options available for students to check into. A single attempt will be permitted. The questions in the test quiz will be similar to those being asked during the 5-week self-learning modules and practice quizzes.

Weight: 5% of the total mark.

Assessment Task 4

Micro-Controller Lab assessment

Students will work in the lab during the allotted time to develop an original embedded solution using an ARM Cortex micro-controller board. The week prior to the test, a dry-run activity will be offered for students to become familiar with the format.

Rubric: Will be specified within the task.

Weight: 19% of the total mark.

Assessment items: Design decisions (as documented), circuit assembly (as inspected), and system operation (as tested).

Assessment sessions of submitted solution: Will be held in Week 12. Session allocation will be determined by the Course Convenor and specified on the course page.

Assessment Task 5

Final exam

a 2-hour in-person written examination with a mix of multi-choice and worked answer questions. The questions will cover conceptual aspects of the course, and exercises will mirror activities explored in the tutorials.

Weight: 30%

Other information: Students completing double-badged course ENGN6213 will have one differentiated, Master's level question in the exam.

Academic Integrity

Academic integrity is a core part of the ANU culture as a community of scholars. The University’s students are an integral part of that community. The academic integrity principle commits all students to engage in academic work in ways that are consistent with, and actively support, academic integrity, and to uphold this commitment by behaving honestly, responsibly and ethically, and with respect and fairness, in scholarly practice.

The University expects all staff and students to be familiar with the academic integrity principle, the Academic Integrity Rule 2021, the Policy: Student Academic Integrity and Procedure: Student Academic Integrity, and to uphold high standards of academic integrity to ensure the quality and value of our qualifications.

The Academic Integrity Rule 2021 is a legal document that the University uses to promote academic integrity, and manage breaches of the academic integrity principle. The Policy and Procedure support the Rule by outlining overarching principles, responsibilities and processes. The Academic Integrity Rule 2021 commences on 1 December 2021 and applies to courses commencing on or after that date, as well as to research conduct occurring on or after that date. Prior to this, the Academic Misconduct Rule 2015 applies.

 

The University commits to assisting all students to understand how to engage in academic work in ways that are consistent with, and actively support academic integrity. All coursework students must complete the online Academic Integrity Module (Epigeum), and Higher Degree Research (HDR) students are required to complete research integrity training. The Academic Integrity website provides information about services available to assist students with their assignments, examinations and other learning activities, as well as understanding and upholding academic integrity.

Online Submission

Assignments are submitted using Turnitin on the Canvas website. Students are required to electronically sign a declaration as part of the submission of assignments. Please keep a copy of the assignment for students’ own records. Where applicable, assignments must include the cover sheet available on the Canvas website. Please keep a copy of tasks completed for students’ own records.

Hardcopy Submission

N/A

Late Submission

Late submission of the FPGA project report without an extension are penalised at the rate of 5% of the possible marks available per working day or part thereof, as per standard ANU assessment procedures.

Referencing Requirements

The Academic Skills website has information to assist you with your writing and assessments. The website includes information about Academic Integrity including referencing requirements for different disciplines. There is also information on Plagiarism and different ways to use source material. Any use of artificial intelligence must be properly referenced. Failure to properly cite use of Generative AI will be considered a breach of academic integrity.

Returning Assignments

Submitted assignments will be returned to students after marking either via the Canvas submission link or the Turnitin platform.

Extensions and Penalties

Extensions and late submission of assessment pieces are covered by the Student Assessment (Coursework) Policy and Procedure. Extensions may be granted for assessment pieces that are not examinations or take-home examinations. If you need an extension, you must request an extension in writing on or before the due date. If you have documented and appropriate medical evidence that demonstrates you were not able to request an extension on or before the due date, you may be able to request it after the due date.

Resubmission of Assignments

N/A

Privacy Notice

The ANU has made a number of third party, online, databases available for students to use. Use of each online database is conditional on student end users first agreeing to the database licensor’s terms of service and/or privacy policy. Students should read these carefully. In some cases student end users will be required to register an account with the database licensor and submit personal information, including their: first name; last name; ANU email address; and other information.
In cases where student end users are asked to submit ‘content’ to a database, such as an assignment or short answers, the database licensor may only use the student’s ‘content’ in accordance with the terms of service – including any (copyright) licence the student grants to the database licensor. Any personal information or content a student submits may be stored by the licensor, potentially offshore, and will be used to process the database service in accordance with the licensors terms of service and/or privacy policy.
If any student chooses not to agree to the database licensor’s terms of service or privacy policy, the student will not be able to access and use the database. In these circumstances students should contact their lecturer to enquire about alternative arrangements that are available.

Distribution of grades policy

Academic Quality Assurance Committee monitors the performance of students, including attrition, further study and employment rates and grade distribution, and College reports on quality assurance processes for assessment activities, including alignment with national and international disciplinary and interdisciplinary standards, as well as qualification type learning outcomes.

Since first semester 1994, ANU uses a grading scale for all courses. This grading scale is used by all academic areas of the University.

Support for students

The University offers students support through several different services. You may contact the services listed below directly or seek advice from your Course Convener, Student Administrators, or your College and Course representatives (if applicable).

• ANU Health, safety & wellbeing for medical services, counselling, mental health and spiritual support
• ANU Accessibility for students with a disability or ongoing or chronic illness
• ANU Dean of Students for confidential, impartial advice and help to resolve problems between students and the academic or administrative areas of the University
• ANU Academic Skills supports you make your own decisions about how you learn and manage your workload.
• ANU Counselling promotes, supports and enhances mental health and wellbeing within the University student community.
• ANUSA supports and represents all ANU students